ZL30416 pll equivalent, sonet/sdh clock multiplier pll.
* Low jitter clock outputs suitable for OC-192, OC48, OC-12, OC-3 and OC-1 SONET applications as defined in Telcordia GR-253-CORE Low jitter clock outputs suitable fo.
as defined in Telcordia GR-253-CORE Low jitter clock outputs suitable for STM-64, STM16, STM-4 and STM-1 applications as.
The ZL30416 is an Analog Phase-Locked Loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The ZL30416 generates low jitter output.
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