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ZL30416 Datasheet SONET/SDH Clock Multiplier PLL

Manufacturer: Zarlink Semiconductor

Datasheet Details

Part number ZL30416
Manufacturer Zarlink Semiconductor
File Size 367.44 KB
Description SONET/SDH Clock Multiplier PLL
Download ZL30416 Download (PDF)

General Description

The ZL30416 is an Analog Phase-Locked Loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment.

The ZL30416 generates low jitter output clocks suitable for Telcordia GR-253CORE OC-192, OC-48, OC-12, OC-3, and OC-1 and ITU-T G.813 STM-64, STM-16, STM-4 and STM-1 applications.

The ZL30416 accepts a CMOS compatible reference at 19.44 MHz or a differential LVDS, LVPECL or CML reference at 19.44 or 77.76 MHz and generates a differential LVPECL output clock selectable to 19.44, 38.88, 77.76, 155.52 or 622.08 MHz and a singleended CMOS clock at 19.44 MHz.

Overview

www.DataSheet4U.com ZL30416 SONET/SDH Clock Multiplier PLL Data.

Key Features

  • Low jitter clock outputs suitable for OC-192, OC48, OC-12, OC-3 and OC-1 SONET.