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ZVN2120C Datasheet Preview

ZVN2120C Datasheet

N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

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N-CHANNEL ENHANCEMENT
MODE VERTICAL DMOS FET
ISSUE 2 – MARCH 94
FEATURES
* 200 Volt VDS
* RDS(on)=10
ZVN2120C
REFER TO ZVN2120A FOR GRAPHS
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Drain-Source Voltage
Continuous Drain Current at Tamb=25°C
Pulsed Drain Current
Gate Source Voltage
Power Dissipation at Tamb=25°C
Operating and Storage Temperature Range
SYMBOL
VDS
ID
IDM
VGS
Ptot
Tj:Tstg
GD
S
E-Line
TO92 Compatible
VALUE
200
180
2
± 20
700
-55 to +150
UNIT
V
mA
A
V
mW
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage
BVDSS 200
V ID=1mA, VGS=0V
Gate-Source Threshold
Voltage
VGS(th) 1 3 V ID=1mA, VDS= VGS
Gate-Body Leakage
Zero Gate Voltage Drain
Current
IGSS
IDSS
20 nA VGS=± 20V, VDS=0V
10 µA VDS=200V, VGS=0
100 µA VDS=160V, VGS=0V,
T=125°C(2)
On-State Drain Current(1)
ID(on)
Static Drain-Source On-State RDS(on)
Resistance (1)
500
10
mA VDS=25V, VGS=10V
VGS=10V,ID=250mA
Forward Transconductance gfs
(1)(2)
100
mS VDS=25V,ID=250mA
Input Capacitance (2)
Common Source Output
Capacitance (2)
Ciss
Coss
85 pF
20 pF VDS=25 V, VGS=0V, f=1MHz
Reverse Transfer
Capacitance (2)
Crss
7 pF
Turn-On Delay Time (2)(3)
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
td(on)
tr
td(off)
tf
8 ns
8 ns VDD25V, ID=250mA
20 ns
12 ns
(1) Measured under pulsed conditions. Width=300µs. Duty cycle 2%
(2) Sample test.
3-371
(
3


Part Number ZVN2120C
Description N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET
Maker Zetex Semiconductors
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ZVN2120C Datasheet PDF






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