* 3-state outputs designed specifically for bus driving. This makes these devices particularly suitable for implementing buffer registers, I/O ports, and working registers. The flip-flops enter data on the low-to-high transition of the clock. The 74AC11874 has clear (1CLR and 2CLR) inputs and noninver
74AC11874 Datasheet (126.54 KB)
74AC11874
126.54 KB
Dual 4-bit d-type edge-triggered flip-flop.
74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 MARCH 1990 REVISED APRIL 1993 3-State.
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