ADS5296A Datasheet | Texas Instruments

FEATURES - 2 Configurable Modes of Operation: - 10-Bit, 200-MSPS, 4-Channel ADC - 12-Bit, 160-MSPS, 4-Channel ADC - 10-Bit, 100-MSPS, 8-Channel ADC - 12-Bit, 80-MSPS, 8-Channel ADC - Designed for Low Power: - 65 m W per Channel at 80 MSPS (12-Bit, 8-Channel) - 150 m W per Channel at 200 MSPS (10-Bit, 4-Channel) - 12-Bit, 80 MSPS: - SNR: 70.3 d BFS - 10-Bit, 200 MSPS: - SNR: 61.3 d BFS - Interleaving Spur: > 60 d Bc at 90 MHz - Serial LVDS One-Wire Interface: - 10x Serialization up to 1000 Mbps Data Rate per Wire - 12x Serialization up to 960 Mbps Data Rate per Wire - Digital Processing Block: - Programmable FIR Decimation Filter and Oversampling to Minimize Harmonic Interference - Programmable IIR High-Pass Filter to Minimize DC Offset - Programmable Digital Gain: 0 d B to 12 d B - Low-Frequency Noise Suppression Mode - Programmable Mapping Between ADC Input Channels and LVDS Output Pins - Channel Averaging Mode - Variety of LVDS Test Patterns to Verify Data Capture by FPGA or Receiver - Package: 9-mm × 9-mm QFN-64 DESCRIPTION The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter (ADC) with sample rates up to 80 MSPS. However, the device can also be configured to operate as a 4-channel ADC running at 2x the sample rate by interleaving data from two ADC channels. In interleaving mode, the device accepts a double frequency input clock. Each ADC in a pair converts a mon analog input signal at alternate rising edges of the 2x input clock. The device can either be configured as a 10-bit, 4-channel ADC with sample rates up to 200 MSPS or as a 12-bit, 4channel ADC with sample rates up to 160 MSPS. The data from each ADC within the interleaved pair is output in serial format over one LVDS pair up to a maximum data rate of 1 Gbps (10 bits at 100 MSPS). With interleaving disabled, the ADS5296A can also be operated as an 8-channel, 10-bit device with sample rates up to 100 MSPS. Several digital functions monly used in systems are included in the device. These...