CD54HC195 Overview
Description
Asynchronous Master Reset - J, K, (D) Inputs to First Stage - Fully Synchronous Serial or Parallel Data Transfer - Shift Right and Parallel Load Capability - Complementary Output From Last Stage - Buffered Inputs - CTyLp=ic1a5l pfMF,ATXA==5205MoHCz at VCC = 5V, - Fanout (Over Temperature Range) - Standard Outputs. Wide Operating Temperature Range.
