Datasheet4U Logo Datasheet4U.com

CD54HC75F3A - Dual 2-Bit Bistable Transparent Latch

Download the CD54HC75F3A datasheet PDF. This datasheet also covers the CD54HC75 variant, as both devices belong to the same dual 2-bit bistable transparent latch family and are provided as variant models within a single manufacturer datasheet.

General Description

True and Complementary Outputs Buffered Inputs and Outputs Fanout (Over Temperature Range) - Standard Outputs 10 LSTTL Loads - Bus Driver Outputs

.

.

.

Wide Operating Temperature Range .

.

.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CD54HC75-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CD54 Ind / Wirewound Sumida
CD54-390LB Ind / Wirewound Sumida
CD54-390LC Ind / Wirewound Sumida
CD54-470L 200 mA/ PFM Step-Up Micropower Switching Regulator ON Semiconductor
CD54-470L 200 mA/ PFM Step-Up Micropower Switching Regulator ON

Other Datasheets by Texas Instruments

Part Number Description
CD54HC75 Dual 2-Bit Bistable Transparent Latch
CD54HC7266 Quadruple 2-Input XNOR Gates
CD54HC7266F Quadruple 2-Input XNOR Gates
CD54HC73 Dual J-K Flip-Flop
CD54HC74 Dual D Flip-Flop

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data sheet acquired from Harris Semiconductor SCHS135F March 1998 - Revised October 2003 CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 Dual 2-Bit Bistable Transparent Latch [ /Title (CD74 HC75, CD74 HCT75 ) /Subject (Dual 2-Bit Bistabl e Features Description • True and Complementary Outputs • Buffered Inputs and Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E and 2E) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output.