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CD54HC4017, CD74HC4017
Data sheet acquired from Harris Semiconductor SCHS200D
High-Speed CMOS Logic
November 1997 - Revised October 2003 Decade Counter/Divider with 10 Decoded Outputs
[ /Title (CD74 HC401 7) /Subject (High Speed CMOS Logic Decade Counte
Features
Description
• Fully Static Operation
• Buffered Inputs
• Common Reset
• Positive Edge Clocking • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . .