CD74HCT165
Features
Description
- Buffered Inputs
- Asynchronous Parallel Load
- plementary Outputs
- Fanout (Over Temperature Range)
- Standard Outputs
- -
- 10 LSTTL Loads
- Bus Driver Outputs
- - . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55o C to 125o C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction pared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input patibility, Il ≤ 1µA at VOL, VOH
The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift registers with plementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When the PL is HIGH, data enters the register serially at the DS...
