1.8-v phase lock loop clock driver.
* 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications
* Spread Spectrum Clock Compatible
* Operating Frequency: 125 MHz to 410.
* Spread Spectrum Clock Compatible
* Operating Frequency: 125 MHz to 410 MHz
* Application Frequency: 160 MH.
The CDCUA877 is a high-performance, low-jitter, low-skew, zero-delay buffer that distributes a differential clock input pair (CK, CK) to ten differential pairs of clock outputs (Yn, Yn) and to one differential pair of feedback clock outputs (FBOUT, F.
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