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DLPC6401 - Data Processor

Description

The DLPC6401 digital controller, part of the DLP4500 (.45 WXGA) chipset, supports reliable operation of the DLP4500 digital micromirror device (DMD).

Features

  • 1 Provides a 30-Bit Input Pixel Interface:.
  • YUV, YCrCb, or RGB Data Format.
  • 8, 9, or 10 Bits per Color.
  • Pixel Clock Support up to 150 MHz.
  • Provides a Single Channel, LVDS Based, Flat-Panel Display (FPD)-Link Compatible Input Interface:.
  • Supports Sources up to a 90-MHz Effective Pixel Clock Rate.
  • Four Demodulated Pixel-Mapped Modes Supported for 8, 9, 10 YUV, YCrCb, or RGB Formatted Inputs.
  • Supports 45- to 120-Hz Frame Rates.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Product Folder Order Now Technical Documents Tools & Software Support & Community DLPC6401 DLPS031C – DECEMBER 2013 – REVISED AUGUST 2015 DLPC6401 DLP® Data Processor 1 Features •1 Provides a 30-Bit Input Pixel Interface: – YUV, YCrCb, or RGB Data Format – 8, 9, or 10 Bits per Color – Pixel Clock Support up to 150 MHz • Provides a Single Channel, LVDS Based, Flat-Panel Display (FPD)-Link Compatible Input Interface: – Supports Sources up to a 90-MHz Effective Pixel Clock Rate – Four Demodulated Pixel-Mapped Modes Supported for 8, 9, 10 YUV, YCrCb, or RGB Formatted Inputs • Supports 45- to 120-Hz Frame Rates • Full Support for Diamond 0.45 WXGA • High-Speed, Double Data Rate (DDR) Digital Micromirror Device (DMD) Interface • 149.
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