* 1
* 2 Low jitter 800 Mbps fully differential data path
* 145 ps (typ) of pk-pk jitter with PRBS = 223
* 1 data pattern at 800 Mbps
* Single +3.3 V Supply
* Less than 413 mW (typ) total power dissipation
* Balanced output impedance
* Output channel
DS90LV110T Datasheet (686.84 KB)
DS90LV110T
686.84 KB
1 to 10 lvds data/clock distributor.
DS90LV110T www.ti.com SNOS522I JANUARY 2001 REVISED APRIL 2013 DS90LV110T 1 to 10 LVDS Data/Clock Distributor Check for Samples.
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