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*2 IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Mode.
* Clock Recovery From PLL Lock to Random Data Patterns.
* Specified Transition Every Data Trans.
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The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide paralle.
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