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SM320C6712C-EP - Digital Signal Processor

Download the SM320C6712C-EP datasheet PDF. This datasheet also covers the SM320C6712-EP variant, as both devices belong to the same digital signal processor family and are provided as variant models within a single manufacturer datasheet.

General Description

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Key Features

  • Hardware Support for IEEE Single-Precision and Double-Precision Instructions.
  • Byte-Addressable (8-, 16-, 32-Bit Data).
  • 8-Bit Overflow Protection.
  • Saturation.
  • Bit-Field Extract, Set, Clear.
  • Bit-Counting.
  • Normalization D Device Configuration.
  • Boot Mode: 8- and 16-Bit ROM Boot.
  • Endianness: Little Endian (12/12C) Little Endian, Big Endian (12D) SGUS055.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SM320C6712-EP-etcTI.pdf) that lists specifications for multiple related part numbers.

Other Datasheets by Texas Instruments

Part Number Description
SM320C6712-EP Digital Signal Processor
SM320C6712D-EP Digital Signal Processor
SM320C6711-EP Digital Signal Processor
SM320C6711B-EP Digital Signal Processor
SM320C6711C-EP Digital Signal Processor
SM320C6711D-EP Digital Signal Processor
SM320C6713-EP Digital Signal Processor
SM320C6713B-EP Digital Signal Processor
SM320C6701-EP Digital Signal Processor
SM320C6701MECH-EP Digital Signal Processor

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SM320C6712ĆEP, SM320C6712CĆEP, SM320C6712DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Low-Price/High-Performance Floating-Point Digital Signal Processors (DSPs): 320C67x (SM320C6712, C6712C, C6712D) − Eight 32-Bit Instructions/Cycle − 100-, 167-MHz Clock Rates − 10-, 6-ns Instruction Cycle Times − 600, 1000 MFLOPS D Advanced Very Long Instruction Word (VLIW) C67x DSP Core − Eight Highly Independent Functional Units: − Four ALUs (Floating- and Fixed-Point) − Two ALUs (Fixed-Point) − Two Multipliers (Floating- and Fixed-Point) − Load-Store Architecture With 32 32-Bit General-Purpose Registers − I