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SM320C6711-EP - Digital Signal Processor

General Description

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Key Features

  • Hardware Support for IEEE Single-Precision and Double-Precision Instructions.
  • Byte-Addressable (8-, 16-, 32-Bit Data).
  • 8-Bit Overflow Protection.
  • Saturation.
  • Bit-Field Extract, Set, Clear.
  • Bit-Counting.
  • Normalization D Device Configuration.
  • Boot Mode: HPI, 8-, 16-, 32-Bit ROM Boot.
  • Endianness: Little Endian, Big Endian SGUS054A.
  • AUGUST 2004.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SM320C6711ĆEP, SM320C6711BĆEP, SM320C6711CĆEP, SM320C6711DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Excellent-Price/Performance Floating-Point Digital Signal Processors (DSPs): 320C67x (C6711, C6711B, C6711C, and C6711D) − Eight 32-Bit Instructions/Cycle − 100-,150-,167-,200-,250-MHz Clock Rates − 10-, 6.