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SM320C6712ĆEP, SM320C6712CĆEP, SM320C6712DĆEP FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Low-Price/High-Performance Floating-Point
Digital Signal Processors (DSPs): 320C67x (SM320C6712, C6712C, C6712D) − Eight 32-Bit Instructions/Cycle − 100-, 167-MHz Clock Rates − 10-, 6-ns Instruction Cycle Times − 600, 1000 MFLOPS
D Advanced Very Long Instruction Word
(VLIW) C67x DSP Core − Eight Highly Independent Functional
Units: − Four ALUs (Floating- and Fixed-Point) − Two ALUs (Fixed-Point) − Two Multipliers (Floating- and
Fixed-Point) − Load-Store Architecture With 32 32-Bit
General-Purpose Registers − I