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SN54HCT125 Datasheet Preview

SN54HCT125 Datasheet

QUADRUPLE BUS BUFFER GATE

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D Operating Voltage Range of 4.5 V to 5.5 V
D High-Current Outputs Drive Up To 15
LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 12 ns
SN54HCT125 . . . J OR W PACKAGE
SN74HCT125 . . . D OR N PACKAGE
(TOP VIEW)
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
SN54HCT125, SN74HCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS069E – NOVEMBER 1988 – REVISED AUGUST 2003
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Inputs Are TTL-Voltage Compatible
D High-Current 3-State Outputs Drive Bus
Lines or Buffer Memory Address Registers
SN54HCT125 . . . FK PACKAGE
(TOP VIEW)
1Y
NC
2OE
NC
2A
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3OE
description/ordering information
NC – No internal connection
These bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube of 25
SN74HCT125N
SN74HCT125N
–40°C to 85°C
SOIC – D
Tube of 50
Reel of 2500
SN74HCT125D
SN74HCT125DR
HCT125
Reel of 250
SN74HCT125DT
CDIP – J
Tube of 25
SNJ54HCT125J
SNJ54HCT125J
–55°C to 125°C CFP – W
Tube of 150
SNJ54HCT125W
SNJ54HCT125W
LCCC – FK
Tube of 55
SNJ54HCT125FK
SNJ54HCT125FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1




etcTI

SN54HCT125 Datasheet Preview

SN54HCT125 Datasheet

QUADRUPLE BUS BUFFER GATE

No Preview Available !

SN54HCT125, SN74HCT125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS069E – NOVEMBER 1988 – REVISED AUGUST 2003
FUNCTION TABLE
(each gate)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
OE
A
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HCT125
MIN NOM MAX
SN74HCT125
UNIT
MIN NOM MAX
VCC Supply voltage
4.5
5 5.5 4.5
5 5.5 V
VIH High-level input voltage
VCC = 4.5 V to 5.5 V
2
2
V
VIL
Low-level input voltage
VCC = 4.5 V to 5.5 V
0.8
0.8 V
VI
Input voltage
0
VCC
0
VCC V
VO
Output voltage
0
VCC
0
VCC V
tt
Input transition (rise and fall) time
500
500 ns
TA
Operating free-air temperature
–55
125 –40
85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN54HCT125
Description QUADRUPLE BUS BUFFER GATE
Maker etcTI
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