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SN65HVD102 Datasheet Preview

SN65HVD102 Datasheet

IO-Link PHY

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SN65HVD101, SN65HVD102
SLLSE84D – MAY 2011 – REVISED MAY 2017
SN65HVD10x IO-Link PHY for Device Nodes
1 Features
1 Configurable CQ Output: Push-Pull, High-Side, or
Low-Side for SIO Mode
• Remote Wake-Up Indicator
• Current Limit Indicator
• Power-Good Indicator
• Overtemperature Protection
• Reverse Polarity Protection
• Configurable Current Limits
• 9-V to 36-V Supply Range
• Tolerant to 50-V Peak Line Voltage
• 3.3-V/5-V Configurable Integrated LDO
(SN65HVD101 ONLY)
• 20-pin QFN Package, 4 mm × 3.5 mm
2 Applications
• Suitable for IO-Link Device Nodes
3 Description
The SN65HVD101 and ‘HVD102 IO-Link PHYs
implement the IO-Link interface for industrial point-to-
point communication. When the device is connected
to an IO-Link master through a 3-wire interface, the
master can initiate communication and exchange
data with the remote node while the SN65HVD10X
acts as a complete physical layer for the
communication.
The IO-Link driver output (CQ) can be used in push-
pull, high-side, or low-side configurations using the
EN and TX input pins. The PHY receiver converts the
24-V IO-Link signal on the CQ pin to standard logic
levels on the RX pin. A simple parallel interface is
used to receive and transmit data and status
information between the PHY and the local controller.
The SN65HVD101 and 'HVD102 implement
protection features for overcurrent, overvoltage and
overtemperature conditions. The IO-Link driver
current limit can be set using an external resistor. If a
short-circuit current fault occurs, the driver outputs
are internally limited, and the PHY generates an error
signal (SC). These devices also implement an
overtemperature shutdown feature that protects the
device from high-temperature faults.
The SN65HVD102 operates from a single external
3.3-V or 5-V local supply. The SN65HVD101
integrates a linear regulator that generates either 3.3
V or 5 V from the IO-Link L+ voltage for supplying
power to the PHY as well as a local controller and
additional circuits.
The SN65HVD101 and 'HVD102 are available in the
20-pin RGB package (4 mm × 3,5 mm QFN) for
space-constrained applications.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN65HVD101
SN65HVD102
QFN (20)
4.00 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
1µF
Sensor
RPU
Vcc
IRQ
GPIO1
GPIO2
MCU
GPIO3
RXD
TXD
GND RTS
Vcc IN Vcc OUT Vcc SET
WAKE
PWR _OK
1µF
L+
CUR _OK SN65HVD101
TEMP _OK
CQ
RX
TX
L-
EN
ILIM ADJ GND
1
2
4
3
RSET
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

SN65HVD102 Datasheet Preview

SN65HVD102 Datasheet

IO-Link PHY

No Preview Available !

SN65HVD101, SN65HVD102
SLLSE84D – MAY 2011 – REVISED MAY 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ..................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Switching Characteristics .......................................... 7
7.7 Typical Characteristics .............................................. 8
8 Parameter Measurement ....................................... 8
9 Detailed Description .............................................. 9
9.1 Overview ................................................................... 9
9.2 Functional Block Diagram ....................................... 10
9.3 Feature Description................................................. 10
9.4 Device Functional Modes........................................ 13
10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
10.2 Typical Application ............................................... 14
10.3 System Examples ................................................ 19
11 Power Supply Recommendations ..................... 20
12 Layout................................................................... 21
12.1 Layout Guidelines ................................................. 21
12.2 Layout Example .................................................... 21
13 Device and Documentation Support ................. 22
13.1 Related Links ........................................................ 22
13.2 Receiving Notification of Documentation Updates 22
13.3 Community Resources.......................................... 22
13.4 Trademarks ........................................................... 22
13.5 Electrostatic Discharge Caution ............................ 22
13.6 Glossary ................................................................ 22
14 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (February 2017) to Revision D
Page
• Changed From: 950 mW To: 950 W, and From: 475 mW To: 475 W in the TVS Evaluation section ................................ 16
Changes from Revision B (April 2015) to Revision C
Page
• Changed pin 1 of the SN65HVD102 From: nc To: Vcc SET ................................................................................................. 3
Changes from Revision A (March 2013) to Revision B
Page
• Added Device Information and ESD Rating tables, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section. .................................... 1
• Changed front-page Simplified Schematic image. ................................................................................................................ 1
• Changed Pin Functions table format ..................................................................................................................................... 4
• Re-write detailed description section. .................................................................................................................................... 9
• Re-write application information section. ............................................................................................................................. 14
Changes from Original (May 2011) to Revision A
Page
• Changed the devices From: Product Preview To: Production................................................................................................ 1
2
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Copyright © 2011–2017, Texas Instruments Incorporated
Product Folder Links: SN65HVD101 SN65HVD102


Part Number SN65HVD102
Description IO-Link PHY
Maker etcTI
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