Datasheet Summary
SN74AHCT74QĆQ1 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP
WITH CLEAR AND PRESET
SGDS008B
- MAY 1998
- REVISED APRIL 2008
D Qualified for Automotive Applications D Inputs Are TTL-Voltage patible D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
D OR PW PACKAGE (TOP VIEW)
1CLR 1 1D 2
1CLK 3 1PRE 4
1Q 5 1Q 6 GND 7
14 VCC 13 2CLR 12 2D 11 2CLK 10 2PRE 9 2Q 8 2Q description
The SN74AHCT74Q is a dual positive-edge-triggered D-type flip-flop.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the...