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SN74AUC1G14-EP Datasheet Preview

SN74AUC1G14-EP Datasheet

Single Schmitt-Trigger Inverter

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www.ti.com
FEATURES
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 2.5 ns at 1.8 V
Low Power Consumption, 10-µA Max ICC
• ±8-mA Output Drive at 1.8 V
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
SN74AUC1G14-EP
SINGLE SCHMITT-TRIGGER INVERTER
SCES673 – SEPTEMBER 2006
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
NC
1
A
2
5
VCC
GND
3
4
Y
See mechanical drawings for dimensions.
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
This single Schmitt-trigger inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to
1.95-V VCC operation.
The SN74AUC1G14 contains one inverter and performs the Boolean function Y = A. The device functions as an
independent inverter, but because of Schmitt action, it may have different input threshold levels for
positive-going (VT+) and negative-going (VT–) signals.
ORDERING INFORMATION
TA
–55°C to 125°C
PACKAGE (1)
SOT (SOT-23) – DBV
Reel of 3000
ORDERABLE PART NUMBER
SN74AUC1G14MDBVREP
TOP-SIDE MARKING(2)
U14_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV: The actual top-side marking has one additional character that designates the assembly/test site. Pin 1 identifier indicates
solder-bump composition (1 = SnPb, = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated




etcTI

SN74AUC1G14-EP Datasheet Preview

SN74AUC1G14-EP Datasheet

Single Schmitt-Trigger Inverter

No Preview Available !

SN74AUC1G14-EP
SINGLE SCHMITT-TRIGGER INVERTER
SCES673 – SEPTEMBER 2006
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
FUNCTION TABLE
INPUT
A
H
L
OUTPUT
Y
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
2
A
4
Y
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
VO
Output voltage range(2)
IIK
Input clamp current
VI < 0
IOK
Output clamp current
VO < 0
IO
Continuous output current
Continuous current through VCC or GND
θJA
Package thermal impedance(3)
DBV package
Tstg
Storage temperature range
MIN
MAX
–0.5
3.6
–0.5
3.6
–0.5
3.6
–0.5 VCC + 0.5
–50
–50
±20
±100
206
–65
150
UNIT
V
V
V
V
mA
mA
mA
mA
°C/W
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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Part Number SN74AUC1G14-EP
Description Single Schmitt-Trigger Inverter
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