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SN74AUP1G79 Key Features

  • 1 Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption: ICC = 0.9 µA Maximum
  • Low Dynamic-Power Consumption: Cpd = 3 pF Typical at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typical
  • Low Noise: Overshoot and Undershoot < 10% of VCC
  • Ioff Supports Partial Power-Down-Mode Operation
  • Input Hysteresis Allows Slow Input Transition and
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

Related Texas Instruments Datasheets

Part Number Description
SN74AUP1G74 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
SN74AUP1G00 Low-Power Single 2-Input Positive-NAND Gate
SN74AUP1G02 Low-Power Single 2-Input Positive-NOR Gate
SN74AUP1G04 Low-Power Single Inverter Gate
SN74AUP1G06 Low-Power Single Inverter

SN74AUP1G79 Description

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family assures a very-low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, thus resulting in an increased battery life. The AUP devices also maintain excellent signal integrity.

SN74AUP1G79 Applications

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22