SN74AUP1G00 Datasheet PDF - Texas Instruments Low-Power Single 2-Input Positive-NAND Gate Specs

SN74AUP1G00 - Low-Power Single 2-Input Positive-NAND Gate

Datasheet Summary

Description

This single 2-input positive-NAND gate performs the Boolean function Y = A × B or Y = A + B in positive logic.

Features

1 ESD Performance Tested Per JESD 22.
2000-V Human-Body Model (A114-B, Class II).
1000-V Charged-Device Model (C101).
Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch.
Low Static-Power Consumption (ICC = 0.9 µA Max).
Low Dynamic-Power Consumption (Cpd = 4 pF Typical at 3.3 V).
Low Input Capacitance (Ci = 1.5 pF Typical).
Low Noise Overshoot and Undershoot.

Datasheet Details

Part number	SN74AUP1G00
Manufacturer	Texas Instruments
File Size	2.79 MB
Description	Low-Power Single 2-Input Positive-NAND Gate
Datasheet	SN74AUP1G00 Datasheet
Additional preview pages of the SN74AUP1G00 datasheet.

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Full PDF Text Transcription

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74AUP1G00 SCES604J – SEPTEMBER 2004 – REVISED DECEMBER 2016 SN74AUP1G00 Low-Power Single 2-Input Positive-NAND Gate 1 Features •1 ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) • Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch • Low Static-Power Consumption (ICC = 0.9 µA Max) • Low Dynamic-Power Consumption (Cpd = 4 pF Typical at 3.3 V) • Low Input Capacitance (Ci = 1.

Published: Jul 30, 2021 |