SN74AUP1G08 Description
This single 2-input positive-AND gate is designed for 0.8V to 3.6V VCC operation and performs the Boolean function Y = A · B or Y = A +B in positive logic. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. SN74AUP1G08 SCES502Q NOVEMBER 2003 REVISED MARCH 2024 .ti.
SN74AUP1G08 Key Features
- Available in the Ultra Small 0.64mm2 Package (DPW) With 0.5mm Pitch
- Low Static-Power Consumption: ICC = 0.9μA Maximum
- Low Dynamic-Power Consumption: Cpd = 4.3pF Typical at 3.3V
- Low Input Capacitance: Ci = 1.5pF Typical
- Low Noise: Overshoot and Undershoot
- Ioff Supports Live Insertion, Partial-Power-Down
- Schmitt-Trigger Action Allows Slow Input Transition
- Wide Operating VCC Range of 0.8V to 3.6V
- Optimized for 3.3V Operation
- 3.6V I/O Tolerant to Support Mixed-Mode Signal Operation
SN74AUP1G08 Applications
- Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22