SN74HC165-Q1 registers equivalent, 8-bit parallel-load shift registers.
a clock-inhibit (CLK INH) function and a complementary serial (QH) output.
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is he.
D ESD Protection Exceeds 1500 V Per
MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
D Wi.
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