SN74LV126A Description
The ‘LV126A quadruple bus buffer gates are designed for 2-V to 5.5-V VCC operation. These quadruple bus buffer gates are designed for 2V to 5.5-V VCC operation.
SN74LV126A Key Features
- 1 2-V to 5.5-V VCC Operation
- Max tpd of 6.5 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at
- Typical VOHV (Output VOH Undershoot) >2.3 V at
- Ioff Supports Live Insertion, Partial Power Down
- Support Mixed-Mode Voltage Operation on All
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)