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SN74LV123A-EP Datasheet Dual Retriggerable Monostable Multivibrators

Manufacturer: Texas Instruments

Overview: SN74LV123AĆEP DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH SCHMITTĆTRIGGER INPUTS SCLS498A − MAY 2003 − REVISED MAY 2004 D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of −40°C to 105°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Supports Mixed-Mode Voltage Operation on All Ports D Schmitt-Trigger Circuitry on A, B, and CLR Inputs for Slow Input Transition Rates † ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. Such qualification testing should not be viewed as justifying use of this ponent beyond specified performance and environmental limits.

General Description

/ordering information D Edge Triggered From Active-High or Active-Low Gated Logic Inputs D Ioff Supports Partial-Power-Down Mode Operation D Retriggerable for Very Long Output Pulses, Up To 100% Duty Cycle D Overriding Clear Terminates Output Pulse D Glitch-Free Power-Up Reset on Outputs D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) PW PACKAGE (TOP VIEW) 1A 1B 1CLR 1Q 2Q 2Cext 2Rext/Cext GND 1 2 3 4 5 6 7 8 16 VCC 15 1Rext/Cext 14 1Cext 13 1Q 12 2Q 11 2CLR 10 2B 9 2A The SN74LV123A is a dual retriggerable monostable multivibrator designed for 2-V to 5.5-V VCC operation.

This edge-triggered multivibrator

Key Features

  • output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connec.

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SN74LV123A-EP Distributor