Datasheet4U Logo Datasheet4U.com

SN74LV125AT - Quadruple Bus Buffer Gates

Datasheet Summary

Description

The SN74LV125AT is a quadruple bus buffer gate.

Features

  • Inputs Are TTL-Voltage Compatible.
  • 4.5-V to 5.5-V VCC Operation.
  • Typical tpd of 3.8 ns at 5 V.
  • Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 5 V, TA = 25°C.
  • Support Mixed-Mode Voltage Operation on All Ports D, DB, NS, OR PW.

📥 Download Datasheet

Datasheet preview – SN74LV125AT

Datasheet Details

Part number SN74LV125AT
Manufacturer Texas Instruments
File Size 1.04 MB
Description Quadruple Bus Buffer Gates
Datasheet download datasheet SN74LV125AT Datasheet
Additional preview pages of the SN74LV125AT datasheet.

📁 Similar Datasheet

  • SN74LVC1G125 - high performance non-inverting buffer (UMW)
  • SN74LVC1G34 - Single buffer (UMW)
  • SN74L71 - AND-Gate R-S Master-Slave F-F (National Semiconductor)
  • SN74L74N - Dual D-Type Flip-Flop (ETC)
  • SN74LS00 - QUAD 2-INPUT NAND GATE (Motorola)
  • SN74LS00 - Quad 2-Input NAND Gate (ON Semiconductor)
  • SN74LS02 - QUAD 2-INPUT NOR GATE (Motorola)
  • SN74LS02 - QUAD 2-INPUT NOR GATE (ON Semiconductor)
  • SN74LS04 - Hex Inverter (ON Semiconductor)
  • SN74LS04 - HEX INVERTER (Motorola)
Other Datasheets by Texas Instruments

Full PDF Text Transcription

Click to expand full text
www.ti.com FEATURES • Inputs Are TTL-Voltage Compatible • 4.5-V to 5.5-V VCC Operation • Typical tpd of 3.8 ns at 5 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2.
Published: |