SN74LV125AT Description
/ORDERING INFORMATION The SN74LV125AT is a quadruple bus buffer gate.
SN74LV125AT Key Features
- Inputs Are TTL-Voltage patible
- 4.5-V to 5.5-V VCC Operation
- Typical tpd of 3.8 ns at 5 V
- Typical VOLP (Output Ground Bounce)
- Typical VOHV (Output VOH Undershoot)
- Support Mixed-Mode Voltage Operation on All
- MAY 2005
- REVISED AUGUST 2005
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17