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SN74LV27A - Triple 3-Input Positive-NOR Gate

Description

These triple 3-input positive-NOR gates are designed for 2-V to 5.5-V VCC operation.

The SN74LV27A devices perform the Boolean function Y = A + B + C in positive logic.

These devices are fully specified for partial-powerdown applications using Ioff.

Features

  • Operation of 2-V to 5.5-V VCC.
  • Max tpd of 7 ns at 5 V.
  • Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II 2.

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SN74LV27A SCES341F – SEPTEMBER 2000 – REVISED JULY 2023 SN74LV27A Triple 3-Input Positive-NOR Gate 1 Features • Operation of 2-V to 5.5-V VCC • Max tpd of 7 ns at 5 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II 2 Description These triple 3-input positive-NOR gates are designed for 2-V to 5.5-V VCC operation. The SN74LV27A devices perform the Boolean function Y = A + B + C in positive logic. These devices are fully specified for partial-powerdown applications using Ioff.
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