SN74SSQEC32882 28-Bit to 56-Bit Registered Buffer
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• JEDEC SSTE32882
• 1-to-2 Register Outputs and 1-to-4 Clock Pair
Outputs Support Stacked DDR3 RDIMMs
• CKE Powerdown Mode for Optimized System
Power Consum.
• DDR3 Registered DIMMs up to DDR3-1866
• DDR3L Registered DIMMs up to DDR3L-1600
• DDR3U Registered DIMMs u.
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