74AHCT273-Q100 Description
74AHCT273-Q100 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 74AHCT273-Q100 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
74AHCT273-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Inputs accept voltages higher than VCC
- Ideal buffer for MOS microcontroller or memory
- mon clock and master reset
- Input levels
- For 74AHC273-Q100: CMOS level
- For 74AHCT273-Q100: TTL level
74AHCT273-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C