• Part: 74AUP1T97
  • Manufacturer: Nexperia
  • Size: 276.04 KB
Download 74AUP1T97 Datasheet PDF
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74AUP1T97 Description

The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; All inputs can be connected directly to VCC or GND.

74AUP1T97 Key Features

  • Wide supply voltage range from 2.3 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Overvoltage tolerant inputs to 3.6 V
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Low static power consumption; ICC = 1.5 μA (maximum)
  • plies with JEDEC standards
  • JESD8-12 (0.8 V to 1.3 V)

74AUP1T97 Applications

  • Wide supply voltage range from 2.3 V to 3.6 V