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74HC109 Datasheet Preview

74HC109 Datasheet

Dual JK flip-flop

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74HC109; 74HCT109
Dual JK flip-flop with set and reset; positive-edge-trigger
Rev. 3 — 1 August 2016
Product data sheet
1. General description
The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual
nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and
complementary nQ and nQ outputs. The set and reset are asynchronous active LOW
inputs and operate independently of the clock input. The nJ and nK inputs control the state
changes of the flip-flops as described in the mode select function table. The nJ and nK
inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for
predictable operation. The JK design allows operation as a D-type flip-flop by connecting
the nJ and nK inputs together. Inputs include clamp diodes. It enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock
rise and fall times.
2. Features and benefits
Input levels:
For 74HC109: CMOS level
For 74HCT109: TTL level
J and K inputs for easy D-type flip-flop
Toggle flip-flop or “do nothing” mode
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C




nexperia

74HC109 Datasheet Preview

74HC109 Datasheet

Dual JK flip-flop

No Preview Available !

Nexperia
74HC109; 74HCT109
Dual JK flip-flop with set and reset; positive-edge-trigger
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74HC109D 40 C to +125 C SO16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT109D
74HC109DB 40 C to +125 C
74HCT109DB
SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT109PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
4. Functional diagram
 
6' 6'
6'


-
-
-
4
4 4




&3
&3
.
.
&3
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.4
5'
4
4
5' 5'




 
PQD
Fig 1. Logic symbol
6

-
 &
 .
5
 6

 -
 &
  .
 5


D
Fig 2. IEC logic symbol
E PQD
&&
.
-
&&
6
5
&3
Fig 3. Logic diagram (one flip-flop)
&
&
&&
&&
4
4
DDD
74HC_HCT109
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 1 August 2016
© Nexperia B.V. 2017. All rights reserved
2 of 19


Part Number 74HC109
Description Dual JK flip-flop
Maker nexperia
Total Page 19 Pages
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