Download the 74HC238D datasheet PDF.
This datasheet also covers the 74HC238 variant, as both devices belong to the same 3-to-8 line decoder/demultiplexer family and are provided as variant models within a single manufacturer datasheet.
General Description
The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).
Full PDF Text Transcription for 74HC238D (Reference)
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74HC238D. For precise diagrams, and layout, please refer to the original PDF.
74HC238; 74HCT238 3-to-8 line decoder/demultiplexer Rev. 8 — 21 March 2024 Product data sheet 1. General description The 74HC238; 74HCT238 decodes three binary weighted a...
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eral description The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes.
74HC238D Datasheet
