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74LVC2G34-Q100 - Dual buffer gate

Description

The 74LVC2G34-Q100 is a dual buffer.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
  • Wide supply voltage range from 1.65 V to 5.5 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low power dissipation.
  • IOFF provides partial Power-down mode operation.
  • Direct interface with TTL levels.
  • Latch-up performance exceeds.

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74LVC2G34-Q100 Dual buffer gate Rev. 5 — 20 January 2022 Product data sheet 1. General description The 74LVC2G34-Q100 is a dual buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.
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