AU1x is a family of combinational one-bit full adders.
Logic Symbol AU1x CI CO A S B Truth Table CI A B S CO LLLLL L LHHL LHLHL L HH L H HL LHL HLHLH HHL LH HHHHH HDL Syntax Verilog AU1x inst_name (CO, S, A, B, CI); VHDL inst_name: AU1x port map (CO, S, A, B, CI); Pin Loading Pin Name A B CI E
Datasheet Details
AU12, AU11
AMI
33.46 KB
Cmos gate array.
This datasheet PDF includes multiple part numbers: AU12, AU11.
Please refer to the document for exact specifications by model.
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