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IDCS3

CMOS Gate Array

IDCS3 General Description

IDCS3 is a non-inverting, CMOS-level Schmitt trigger input buffer piece with voltage hysteresis. Logic Symbol Truth Table Pin Loading IDCS3 QC P PADM D PADM QC LL HH Load PADM 4.90 pF HDL Syntax Verilog IDCS3 inst_name (QC, PADM); VHDL inst_name: IDCS3 port map (QC, PADM); Power Characteris.

IDCS3 Datasheet (17.52 KB)

Preview of IDCS3 PDF

Datasheet Details

Part number:

IDCS3

Manufacturer:

AMI

File Size:

17.52 KB

Description:

Cmos gate array.

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IDCS3 CMOS Gate Array AMI

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