MXI2x is a family of inverting two-to-one digital multiplexers. Logic Symbol Truth Table $0,+ * PLFURQ &026 *DWH $UUD MXI2x S I0 Q I1 S I0 I1 QN L LXH L HX L HX L H HXHL HDL Syntax Verilog MXI2x inst_name (QN, I0, I1, S); VHDL inst_name: MXI2x port map (QN, I0, I1, S); Pin Loadin.
