ODTSXXxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with controlled slew rate outputs. Logic Symbol Truth Table ODTSXXxx A SL PADM A PADM LL HH HDL Syntax Verilog ODTSXXxx inst_name (PADM, A); VHDL inst_name: ODTSXXxx port map (PADM, A); Pin Loading Pin Name A .
