Description
4 Pin Information 5 Pin Descriptions 7 Functional Description 13 Reduced Media Independent Interface (RMII) 13 Serial Media Independent Interface (SMII) 15 Media Independent Interface (MII)
Internal 17 100Base-X Module 19 Scrambler Block 22 100Base-TX Transceiver 24 10Base-T Module 25 Reset Operation 28 MII Registers 30 dc and ac Specifications 43 Absolute Maximum Ratings 43 Clock Timing 44 Outline Diagram 50 128-Pin SQFP 50 Ordering Information 51
Tables
Page
Table 1. MII Int
Features
- s s
4-port, single-chip, integrated physical layer and transceivers for 10Base-T, 100Base-TX, or 100Base-FX functions. IEEE 802.3u Clause 28 compliant autonegotiation for full 10 Mbits/s and 100 Mbits/s control. Extended management support with interrupt capabilities. PHY MIB support. Low-power 500 mA max.
- Low-cost 128-pin SQFP packaging with heat spreader. s
s
IEEE 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD compatible transceiver. Inte.