A6B259KLW Datasheet - Allegro MicroSystems

A6B259KLW 8-BIT ADDRESSABLE DMOS POWER DRIVER

and INPUT REQUIREMENTS ENABLE Four modes of operation are selectable by controlling the CLEAR and ENABLE inputs as shown above. 50% DATA t PLH ADDRESSED OUTPUT t PHL 90% 10% In the addressable-latch mode, data at the DATA input is written into the addressed transparent latch. The addressed ou.

6B259 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 8-BIT ADDRESSABLE DMOS POWER DRIVER The A6B259KA and A6B259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line data in the addressable latches or use as a decoder or demuliplexer. Driver applications include relays, solenoids, and other mediumcurrent or high-voltage peripheral power loads. The CMOS i.

A6B259KLW Features

* s 50 V Minimum Output Clamp Voltage s 150 mA Output Current (all outputs simultaneously) s 5 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B259N and TPIC6B259DW Always order by complete part number: Part Number Package A6B259KA 20-pin DIP A6B259KLW 20-lead SOIC RθJA 55°C/W 70°C

A6B259KLW Datasheet (143.21 KB)