AD805 Datasheet - Analog Devices

AD805 - Data Retiming Phase-Locked Loop

The AD805 is a data retiming phase-locked loop designed for Ouse with a Voltage-Controlled Crystal Oscillator (VCXO) to perform clock recovery and data retiming on Nonreturn to Zero B(NRZ) data. The circuit provides clock recovery and data Sretiming on standard telecommunications STS-3 or STM-1 data.

AD805 Features

* CLOCK RECOVERY AND 155 Mbps Clock Recovery and Data Retiming DATA RETIMING APPLICATION Permits CCITT G.958 Type A Jitter Tolerance Permits CCITT G.958 Type B Jitter Transfer Random Jitter: 0.6؇ rms Pattern Jitter: Virtually Eliminated Jitter Peaking: Fundamentally None DATA INPUT VOLTAGE CON

AD805-AnalogDevices.pdf

AD805 Datasheet Preview — Preview of AD805 PDF

Datasheet Details

Part number:

AD805

Manufacturer:

Analog Devices ↗

File Size:

307.39 KB

Description:

Data retiming phase-locked loop.

AD805 Distributor

📁 Related Datasheet

AD8051 AD8052 AD8054 AD8055 AD8056 AD8057

📌 All Tags

AD805 Data Retiming Phase-Locked Loop Analog Devices