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AD9516-5 14-Output Clock Generator

AD9516-5 Description

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AD9516-5 Features

* Low phase noise, phase-locked loop (PLL) External VCO/VCXO to 2.4 GHz optional 1 differential or 2 single-ended reference inputs Reference monitoring capability Automatic revertive and manual reference switchover/holdover modes Accepts LVPECL, LVDS, or CMOS references to 250 MHz Programmable delays

AD9516-5 Applications

* Low jitter, low phase noise clock distribution 10

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14-Output Clock Generator Analog Devices
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