Description
Data Sheet AD9684 14-Bit, 500 MSPS LVDS, Dual Analog-to-Digital Converter .
Product Highlights 3 Specifications 4
DC Specifications 4 AC Specifications 5 Digital Specifications 6 Switching Specifications7 Timing Specification.
Features
* Parallel LVDS (DDR) outputs
* 1.1 W total power per channel at 500 MSPS (default settings)
* SFDR = 85 dBFS at 170 MHz fIN (500 MSPS)
* SNR = 68.6 dBFS at 170 MHz fIN (500 MSPS)
* ENOB = 10.9 bits at 170 MHz fIN
* DNL = ±0.5 LSB
* INL = ±2.5 LSB
* Noise density =
Applications
* Communications
* Diversity multiband, multimode digital receivers
* 3G/4G, TD-SCDMA, W-CDMA, MC-GSM, LTE
* General-purpose software radios
* Ultrawideband satellite receiver
* Instrumentation (spectrum analyzers, network analyzers, inte-
grated RF test solutions)
* Rada