Description
SHARC Processor ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489 .
3
Family Core Architecture 4 Family Peripheral Architecture 8 I/O Processor Features 11 System Design 12 Development Tools 13 Additional Informa.
Features
* High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational architecture
On-chip memory
* 5 Mbits on-chip RAM, 4 Mbits on-chip ROM
Up to 450 MHz operating frequency Code compatible with all other
Applications
* interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input data port, and more
For complete ordering information, see Ordering Guide AEC-Q100 qualified for automotive applications
SIMD Core
Instruction Cache
5 Stage Sequencer
DAG1/2
Core