Description
SHARC+ Single Core High Performance DSP (Up to 933 MHz) Preliminary Technical Data SYSTEM .
3
SHARC Processor 4 SHARC+ Core Architecture 6 System Infrastructure 8 System Memory Map 8 Security Features 11 Security Features Disclaimer 12.
Features
* Enhanced SHARC+ high performance floating-point core Up to 933 MHz 5 Mb (640 kB) Level 1 (L1) SRAM memory with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed
Powerful DMA system On-chip
Applications
* Automotive: audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS
Consumer: speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones
SYSTEM CONTROL
SECURITY AND PROTECTION SYSTEM PROTECTION UNIT (SPU)
SYSTEM MEMORY PROTECTION UNI