Description
3 Low Power Architecture 3 System Integration 3 ADSP-BF538/ADSP-BF538F Processor Peripherals 3 Blackfin Processor Core 4 Memory Architecture 5 DMA Controllers 8 Real Time Clock 9 Watchdog Timer 9 Timers 9 Serial Ports (SPORTs) 10 Serial Peripheral Interface (SPI) Ports 10 Two Wire Interface 10 UART Ports 10 General-Purpose Ports 11 Parallel Peripheral Interface 11 Controller Area Network (CAN) Interface 12 Dynamic Power Management 12 Voltage Regulation 14 Clock Signals 14 Boo
Features
- Preliminary Technical Data
Up to 500 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of programming and compiler friendly support Advanced debug, trace, and performance monitoring 0.8 V to 1.2 V core VDD with on-chip voltage regulation 3.3 V tolerant I/O with specific 5 V tolerant pins 316-ball Pb-free mini-BGA package
Blackfin® Embedded Processor ADSP-BF538/ADSP-BF538F
Memory mana.