LTC6952 Datasheet (Analog Devices) - Ultralow Jitter / 4.5GHz PLL

LTC6952, Ultralow Jitter / 4.5GHz PLL

The LTC®6952 is a high performance, ultralow jitter, JESD204B/C clock generation and distribution IC.

It includes a Phase Locked Loop (PLL) core, consisting of a reference divider, phase-frequency detector (PFD) with a phase-lock indicator, ultralow noise charge pump and integer feedback divider.

LTC6952 Features

* nn JESD204B/C, Subclass 1 SYSREF Signal Generation nn Low Noise Integer-N PLL nn Additive Output Jitter < 6fsRMS (Integration BW = 12kHz to 20MHz, f = 4.5GHz) nn Additive Output Jitter 65fsRMS (ADC SNR Method) nn EZSync™, ParallelSync™ Multichip Synchronization nn

* 229dBc/Hz Normalized In-Ba