AP2302L Datasheet (BCD Semiconductor) - 2A DDR TERMINATION REGULATOR

AP2302L, 2A DDR TERMINATION REGULATOR

The AP2302L linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM.

The regulator can sink or source up to 2A current continuously, providing enough current for most DDR applications.

VOUT is designed to track the VREF voltage within a ± 20mV tol

AP2302L Features

* Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements Source and Sink Current up to 2A High Accuracy Output Voltage at Full-load Adjustable VOUT by External Resistors Shutdown for Standby or Suspend Mode Operation with High-impedance Output Applications