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CTS100ELT22

Dual CMOS/TTL to Differential PECL Translator

CTS100ELT22 Features

* 0.5ns Typical Propogation Delay

CTS100ELT22 General Description

The CTS100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the CTS100ELT22 makes it ideal for applications that require the translation of a clock.

CTS100ELT22 Datasheet (212.42 KB)

Preview of CTS100ELT22 PDF

Datasheet Details

Part number:

CTS100ELT22

Manufacturer:

CTS

File Size:

212.42 KB

Description:

Dual cmos/ttl to differential pecl translator.

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TAGS

CTS100ELT22 Dual CMOS TTL Differential PECL Translator CTS

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