CTS100ELT22TG

Dual CMOS/TTL to Differential PECL Translator

CTS

CTS100ELT22TG Features

* 0.5ns Typical Propogation Delay

CTS100ELT22TG General Description

The CTS100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the CTS100ELT22 makes it ideal for applications that require the translation of a clock.

CTS100ELT22TG Datasheet (212.42 KB)

CTS100ELT22TG Datasheet Preview — Preview of CTS100ELT22TG PDF

Datasheet Details

Part number:

CTS100ELT22TG

Manufacturer:

CTS

File Size:

212.42 KB

Description:

Dual cmos/ttl to differential pecl translator.

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CTS100ELT22TG Dual CMOS TTL Differential PECL Translator CTS

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CTS100ELT22TG Features

CTS100ELT22TG General Description

Datasheet Details

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