CY26049-36 Datasheet - Cypress Semiconductor

CY26049-36 Global Communications Clock Generator

Reference Input Clock; 8 kHz or 10 to 60 MHz. Clock Output; 8 kHz or high impedance in buffer mode. Frequency Select 1; Determines CLK outputs per Table 1. Frequency Select 2; Determines CLK outputs per Table 1. Voltage Supply; 3.3V. Ground Clock Output; Frequency per Table 1. Pullable Crystal Input.

CY26049-36 Features

* Fully integrated phase-locked loop (PLL)

* FailSafe output

* PLL driven by a crystal oscillator that is phase aligned with external reference

* Output frequencies selectable and/or programmed to standard communication frequencies

* Low-jitter, high-accuracy

CY26049-36_CypressSemiconductor.pdf